EEEE4118: Advanced Power Electronics
Coursework 1: Performance evaluation of power semiconductor devices
Coursework 1 accounts for 30% of the total mark for this module. It assesses learning outcomes of Theme A: Power Semiconductor Devices and Packaging.
• Submission deadline: 3pm, 12th November 2025
• Submission format: a report of pdf format as a stand-alone document.
If you are in doubt, please ask for advice well in advance of the submission deadline.
Prerequisites
LTSpice simulation software. Please download and install from the developer’s website directly:
https://www.analog.com/en/design-center/design-tools-and-calculators/ltspicesimulator.html#
Task 1 (30 marks)
Perform. a short survey (at most 2 pages long) on the double pulse test circuit of power semiconductor devices. For full marks please include the following:
1. Explain what the double pulse test is and why it is used.
2. Include the equivalent circuit schematic and explain the role of each component.
3. Explain the role of the first pulse.
4. Explain the role of the second pulse.
5. Give any appropriate equations which can enhance your answers.
6. Include your references ( at least 5 ) and use IEEE referencing style. when citing your sources.
Task 2 (30 marks)
Device manufacturers provide spice models of their products; these behavioural models aim to replicate in simulations the real device waveforms. LTSpice includes a library with limited number of component models which can be expanded by users. In Task 2 you are required to use LTSpice to analyse the performance of the 600V, 20A rated Rohm N-Channel MOSFET R6020PNJ power semiconductor device using the “double pulse test” methodology and report on your findings.
1. With the use of LTSpice create the schematic/model of the test circuit identified in Task 1. The device under test should be the 600V, 20A rated Rohm NChannel MOSFET R6020PNJ, the test voltage 350V and test current 15A.
Include a snapshot of your model in your report, which should include the following components with their associated values.
Clearly justify the values chosen and show any calculations done.
• DC link voltage source (VDC-link)
• Freewheeling diode (FWD): You can use an ideal diode
• Commutation inductance / inductive load (Lload): By performing a survey of the literature, choose an appropriate value and justify your choice – remember, the inductor can affect the rate of change of current.
• Device Under Test (DUT): Rohm N-Channel MOSFET R6020PNJ. The model of this device can be found in the standard list of devices within LTSpice.
• Gate resistor (RG): Use the datasheet of Rohm N-Channel MOSFET R6020PNJ transistor to select an appropriate gate resistance.
• Gate voltage source (VGS) with Pulse Width Linear (PWL) function (or alternative), being able to produce gate voltage pulses of appropriate widths to conduct the double pulse test.
2. Conduct the double pulse test simulation with Rohm N-Channel MOSFET R6020PNJ as the device under test.
Conduct the test with Vdc=350V and at conduction current (Ion) = 15A.
Give an overview of switching waveforms, over the period from 0s till the double pulse test is complete.
Also include the switching waveforms focused during the turn-on period and the turn-off period.
Include the waveforms of:
• the gate to source voltage (VGS),
• dc link voltage (Vdc),
• drain to source voltage (VDS),
• drain to source current (IDS) and
• Inductor current (IL).
3. Plot the turn-on switching waveform. and extract the turn-on energy loss (ETurnon). Use LTSpice to extract ETurn-on. Show all your working and explain the procedure followed.
4. Plot the turn-off switching waveform. and extract the turn-off energy loss (ETurnoff). Use LTSpice to extract ETurn-off. Show all your working and explain the procedure followed. ETurn-off
Task 3 (35 marks)
In this task, you are required to study SiC-MOSFET of two packaging types TO247-3 and TO247-4 (with Kelvin source connection). Device manufacturer Wolfspeed offers the SiC-MOSFET with both packaging types (e.g. C3M0021120D and C3M0021120K). You can find the models uploaded in Moodle and import them into LTSpice.
1. Please open the C3M0021120D and C3M0021120K models (model .lib files can be opened by a text editor such as Notepad) and draw the equivalent circuits based on the models’ netlists.
2. Based on the equivalent circuits of the two models obtained, what are the different parasitic inductances values used in the two models?
3. Now create a switching circuit using the two models (one switching circuit for each model) and keep the additional power loop and gate driver loop parasitic inductance values identical in the two simulation circuits. Please compare the turn-ON and turn-OFF simulation results in terms of the Id, Vds and Vgs waveforms when the switching voltage is 800V and switching current is 20A, and comment on your results.
4. Compare the turn-ON, turn-OFF and total switching losses of the two devices when switching voltage is 800V, and switching current is 20A, 30A, 40A and 50A. What are your conclusions and comment on the results.
Further assessment criteria (5 marks)
The report should have a logical structure throughout, a title/cover page, pagination, table of contents, sections and appendixes clearly labelled.
Figures, plots and tables should be enumerated and must have captions. They should be appropriate, of high quality, clean, any embedded text should be of large font size and cross references should be used consistently when commenting or referring to them in the body of the report. Appropriate axis labels should be included when plots are presented.
Written explanations should be relevant, clear, easy to understand with few spelling mistakes.
Where external sources are used, correct referencing and citation should be conducted using an appropriate referencing style. (e.g. IEEE referencing style).