代做ECE – GY 6403 Fundamentals of Analog Integrated Circuit Design - Fall 2025代写留学生数据结构程序

ECE - GY 6403 Fundamentals of Analog Integrated Circuit Design - Fall 2025

Final Project

Design of a folded-cascode OTA

The objective of this final project is to design a folded-cascode operational transconductance amplifier (OTA). The OTA should satisfy the following specifications:

•   Gain > 70 dB

•   w3dB > 20 kHz

•    Slew Rate > 30 V/μs

•    Phase Margin > 60。

•    Power consumption < 100 μW

The cascode configuration is needed for achieving 70 dB gain in a single-stage differential amplifier. Please use the parameters below in your design.

•    VDD = 1.2 V

•    CL  = 2 pF

Hint: You can use the schematic in Razavi’s book, Fig. 9.18, or from your class notes. Note that the output should be single-ended. To achieve sufficient gain of the OTA, you need to choose the width and length of each transistor carefully. There are various methods that can be used to size the transistors properly. A common design procedure begins with rough hand calculation to estimate the sizing of each transistor as a starting point.  The following steps will elaborate on the sizing by iteration, helped  by the simulation results.

Hint: Design the OTA first, using a DC voltage supply in your simulation for the bias. Once all the requirements for the OTA are met, you can proceed to design the voltage biasing circuit.

Project Report

Your project report should include the following results:

•   Circuit design

o In this part, you should explain how you used the design specifications to do hand calculations for sizing each transistor. This will serve as the starting point for the subsequent simulations.

•   Simulation results

o Sizing. In this section, you should provide an overall description of how the OTA operates.

•   After your hand calculations and what modifications (and why) you did to satisfy all the design requirements. You should also include in this part the design of the voltage biasing circuit. The biasing circuit can be as simple as a current mirror for this part. At the end of this section, please include a table with the sizes of all your transistors.

o AC simulations: In this part, you will present the results of your AC simulation. Your focus should be on showing the OTA gain, w3dB, and phase margin.

o Slew rate: In this part, you will have to present how you tested the slew rate of your OTA.

o Power consumption: In this part, you will use DC analysis to evaluate the power consumption of your design.

o Noise: In this part, you should calculate the input-referred noise voltage of your design.

o Transient simulation: In this part, you should show a transient simulation result that demonstrates the low-frequency gain of 70 dB.

o (20% Bonus) Layout: In this part, provide the LVS and DRC results of your circuit. (The tutorial for this part is provided on the course’s page.)





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