ECE - GY 6403 Fundamentals of Analog Integrated Circuit Design
Fall Semester 2025
Project problem 2
Deliverables:
- Handwritten or computer typed solution for each problem showing your reasoning and calculations to get the results. Clearly state and justify any assumption you deemed necessary to get the result. There is no specific format to present your homework, but all the problems should be presented in just one file (.pdf, .doc, etc.). Keep your work organized and easy to follow.
- Answer all highlighted parts of project problem in a lab report.
Project problem 2:
This problem is a follow up of Project problem 1. You will continue to analyze the Five-Transistor OTA in Cadence Virtuoso and experiment with its properties. This problem grade goes toward your project and not homework.
Modify the Five-Transistor OTA schematic from Project problem 1 to that shown in Figure 1 below.
Figure 1: Schematic of 5-transistor OTA for Project problem 2
Before simulating anything, perform hand calculations on what the values of the poles are for this circuit. You may leave your answers in terms of gm, ro, CGD, CGS, CBD, and CBS.
Hint: This circuit has three poles at nodes Vin+ (or Vin-), Vx, and Vout.
Perform hand calculations on what the values of the zeros are for this circuit. You may leave your answers in terms of gm, ro, CGD, CGS, CBD, and CBS.
Hint: Zeros are formed whenever we have a secondary path for the signal to flow. This circuit has two zeros, one is formed due to the miller capacitance C GD1 (or CGD2). The second zero is formed due to the miller capacitance of C GD4 .
Run the AC simulation. You should see bode plots of the magnitude and phase of the OTA. Submit the bode plots of your magnitude and phase.
In the gain plot, you will notice that the gain remains flat at low frequencies, but eventually begins to attenuate after the first pole. This pole is referred to as the “dominant pole”. Identify which of the poles in the circuit is the dominant pole. Does the value of the dominant pole match your hand calculations? Use markers to identify the 3 dB bandwidth as well as the unity gain bandwidth directly on the plots.
Cadence Virtuoso has other special functions to aid in identifying important parameters in AC analysis. Add the following expressions in your ADE L window using the calculator tool. See Figure 6 as an example of how to use the calculator.
1. value(db20(VF(“/vout”)) 1) – This expression computes the value of output ac voltage at 1 Hz. This is equal to the DC gain.
2. bandwidth(VF(“/vout”) 3 “low”) – This expression computes the 3 dB
bandwidth of amplifier. The 3 dB bandwidth is equal to the value of the dominant pole.
3. unityGainFreq(VF(“/vout”)) – This expression computes the unity gain bandwidth of the amplifier.
4. phaseMargin(VF(“/vout”)) – This expression computes the phase margin of the amplifier.
Figure 2: Expression for finding 3 dB bandwidth in calculator
Re-run the simulation and record the values achieved from the expressions. Is the amplifier stable?
Check if the value of the DC gain matches the small-signal gain obtained by running a transient analysis. Submit plots of your transient waveforms.
Answer all highlighted parts of project problem 2 in a lab report.